ASM3P2108a peak emi reducing solution ?2010 scillc. all rights reserved. p u blication order number: october 2010 C rev. 2 a sm3p2108/d features fcc approved method of emi attenuation. generates a 1x low emi spread spectrum clock of the input frequency. input frequency range: 25mhz to 45mhz. internal loop filter minimizes external components and board space. frequency deviation: - 1.3%( typ) @ 32mhz. low cycle-to-cycle jitter. 5.0v 5% operating voltage range. ttl or cmos compatible outputs. available in 8-pin soic package. p r oduct description the ASM3P2108a is a versatile spread spectrum fr equency modulator designed specifically for input clock frequencies from 25mhz to 45mhz. the ASM3P2108a can generate an emi reduced clock from crystal, ceramic resonator, or system clock. the ASM3P2108a reduces electromagnetic interference (emi) at the clock source, allowing system wide reduction of emi of down stream clock and data dependent signals. the ASM3P2108a allows significant system cost savings by reducing the number of circuit board layers ferrite beads, shielding and other passive components that are traditionally required to pass emi regulations. the ASM3P2108a uses the most efficient and optimized modulation profile approved by the fcc and is implemented in a proprietary all digital method. the ASM3P2108a modulates the output of a single pll in order to spread the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. this results in significantly lower system emi compared to the typical narrow band signal produced by oscillators and most frequency generators. lowering emi by increasing a signals bandwidth is called spread spectrum clock generation. applications the ASM3P2108a is targeted towards emi management fo r high speed digital applications such as pc peripheral devices, consumer electronics and embedded controller systems. b lo ck diagram gnd x i n xout crystal oscillator frequency divider feedback divider modulation phase detector loop filter vco output divider clockout pll v dd
ASM3P2108a rev. 1 | page 2 of 5 | www.onsemi.com clockout 1 2 3 4 5 6 7 8 ASM3P2108a xin / clkin xout gnd nc vdd nc nc pin configuration p in description pin# pin name type description 1 xin / clkin i crystal connection or external reference frequency input. this pin has dual functions. it can be connected to either an external crystal or an external reference clock. 2 xout o crystal connection. if using an external reference, this pin must be left unconnected. 3 gnd p ground to entire chip. 4 nc - no connect. 5 clockout o spread spectrum low emi output. 6 vdd p power supply for the entire chip (5v). 7 nc - no connect. 8 nc - no connect. absolute maximum ratings symbol parameter rating unit v dd , v in voltage on any pin with respect to ground -0.5 to +7.0 v t stg storage temperature -65 to +125 c t a operating temperature 0 to 70 c t s max. soldering temperature (10 sec) 260 c t j junction temperature 150 c t dv static discharge voltage (as per jedec std22- a114-b) 2 kv note: these are stress ratings only and are not implied for functional use. exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. operating conditions symbol parameter min max unit vdd supply voltage with respect to vss 4.75 5.25 v t a operating temperature -40 +85 c c l load capacitance 15 pf c in input capacitance 7 pf
ASM3P2108a rev. 1 | page 3 of 5 | www.onsemi.com dc electrical characteristics symbol parameter min typ max unit v il input low voltage gnd C 0.3 0.8 v v ih input high voltage 2.0 v dd + 0.3 v i il input low current 44 a i ih input high current 66 a i xol x out output low current (@ 0.4, v dd = 5v) 3 ma i xoh x out output high current (@2.5v, v dd = 5v) 3 ma v ol output low voltage (v dd = 5v, i ol = 20ma) 0.4 v v oh output high voltage (v dd = 5v, i oh = 20ma) 2.5 v i cc dynamic supply current normal mode (5v, 32mhz and 15pf loading) 40 ma i dd static supply current standby mode 40 a v dd operating voltage 4.75 5.0 5.25 v t on power up time (first locked clock cycle after power up) 0.18 ms z out clock out impedance 50 ac electrical characteristics symbol parameter min typ max unit f in input frequency 25 45 mhz modout output frequency 25 45 mhz f d frequency deviation input frequency = 25mhz -1.98 % input frequency = 45mhz -0.60 t lh * output rise time (measured at 0.8v to 2.0v) 440 ps t hl * output fall time (measured at 2.0v to 0.8v) 300 ps t jc jitter (cycle to cycle) 360 ps t d output duty cycle 45 50 55 % * v dd = +5v, input frequency = 32mhz, t lh and t hl are measured into a capacitive load of 15pf
ASM3P2108a rev. 1 | page 4 of 5 | www.onsemi.com package information 8 -pin soic package d e h d a1 a2 a q l c b e symbol dimensions inches millimeters min max min max a1 0.004 0.010 0.10 0.25 a 0.053 0.069 1.35 1.75 a2 0.049 0.059 1.25 1.50 b 0.012 0.020 0.31 0.51 c 0.007 0.010 0.18 0.25 d 0.193 bsc 4.90 bsc e 0.154 bsc 3.91 bsc e 0.050 bsc 1.27 bsc h 0.236 bsc 6.00 bsc l 0.016 0.050 0.41 1.27 0 8 0 8
ASM3P2108a on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. typical parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including typicals must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. u.s patent pending; timing-safe and active bead are trademarks of pulsecore semiconductor, a wholly owned subsidiary of on semiconductor. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information literature fulfillment: literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone: 303-675-2175 or 800-344-3860 toll free usa/canada fax: 303-675-2176 or 800-344-3867 toll free usa/canada email: orderlit@onsemi.com n. american technical support: 800-282-9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81-3-5773-3850 on semiconductor website: www.onsemi.com order literature: http://www.onsemi.com/orderlit for additional information, please contact your local sales representative o rdering codes part number marking package temperature ASM3P2108af-08sr aeg 8-pin soic, tape and reel, pb free 0c to +70c a microdot placed at the end of last row of marking or just below the last row toward the center of package indicates pb-free.
|
